Difference between revisions of "Main Page"
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** [[Memory]] - Spectranet memory layout and usage. | ** [[Memory]] - Spectranet memory layout and usage. | ||
** [[Spectranet Parts List|Parts list]] - the "bill of materials". | ** [[Spectranet Parts List|Parts list]] - the "bill of materials". | ||
** [[Software]] - | ** [[Software]] - A reference for writing software that uses the Spectranet. | ||
* [[Diagnostics]] - A simple diagnostics card - assists in fixing broken machines. | * [[Diagnostics]] - A simple diagnostics card - assists in fixing broken machines. | ||
Revision as of 20:52, 3 June 2008
Latest News
Since the project is now getting under way in a 'real way' for the Spectrum ethernet board, this wiki has been set up as an easy way to document the project. Additionally, WebSVN has been set up so that the Spectranet repository can be browsed and downloaded easily: see http://spectrum.alioth.net/svn .
See the news blog for more.
Project Info
- Spectranet - The Spectrum ethernet card - make your Spectrum talk to the world.
- Prototyping - tools for prototyping the ethernet board.
- Logic design - how the board pages memory, traps execution, and works with other hardware.
- W5100 - The ethernet PHY/MAC/TCP offload engine.
- Memory - Spectranet memory layout and usage.
- Parts list - the "bill of materials".
- Software - A reference for writing software that uses the Spectranet.
- Diagnostics - A simple diagnostics card - assists in fixing broken machines.
Tools
The software tools used for all of these projects are:
- gschem: http://www.geda.seul.org/tools/gschem/ - gEDA Schematic Capture.
- PCB: http://pcb.sourceforge.net/ - PCB editor.
- Xilinx WebKit ISE - for configuring the CPLD. http://www.xilinx.com
Gerber files and PostScript files will also be available, so if you don't want to edit the PCB layouts or schematics, you can produce the phototools/toner transfer sheets without needing them. You will need at least the Impact part of ISE to program a CPLD. Programming hardware can be as simple as a parallel cable since Xilinx CPLDs are programmed via JTAG rather than some byzantine high voltage programming method.