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[/] [branches/] [gnubinutils/] [rom/] [w5100_defs.inc] - Blame information for rev 384

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1 24 winston
;The MIT License
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;
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;Copyright (c) 2008 Dylan Smith
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;
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;Permission is hereby granted, free of charge, to any person obtaining a copy
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;of this software and associated documentation files (the "Software"), to deal
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;in the Software without restriction, including without limitation the rights
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;to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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;copies of the Software, and to permit persons to whom the Software is
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;furnished to do so, subject to the following conditions:
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;
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;The above copyright notice and this permission notice shall be included in
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;all copies or substantial portions of the Software.
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;
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;THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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;IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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;FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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;AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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;LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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;OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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;THE SOFTWARE.
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        ; Assumptions: The W5100 is paged into paging area A (0x1000)
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        ; for register manipulation.
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        ; Register definitions for the W5100. Offset by 0x1000 bytes.
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28
        ; Common registers.
29 384 winston
MR      equ     0x1000  ; Mode register
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GAR0    equ     0x1001  ; Gateway addr first octet
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GAR1    equ     0x1002
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GAR2    equ     0x1003
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GAR3    equ     0x1004
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SUBR0   equ     0x1005  ; Subnet mask, first octet
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SUBR1   equ     0x1006
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SUBR2   equ     0x1007
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SUBR3   equ     0x1008
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SHAR0   equ     0x1009  ; Our ethernet address, first of 6
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SHAR1   equ     0x100A
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SHAR2   equ     0x100B
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SHAR3   equ     0x100C
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SHAR4   equ     0x100D
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SHAR5   equ     0x100E
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SIPR0   equ     0x100F  ; First octet of our IP address
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SIPR1   equ     0x1010
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SIPR2   equ     0x1011
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SIPR3   equ     0x1012
48
IR      equ     0x1015  ; Interrupt register
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IMR     equ     0x1016  ; Interrupt mask
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RTR0    equ     0x1017  ; Retry time
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RTR1    equ     0x1018
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RCR     equ     0x1019  ; Retry count register
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RMSR    equ     0x101A  ; RX memory size
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TMSR    equ     0x101B  ; TX memory size
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PATR0   equ     0x101C  ; PPPoE authentication type
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PATR1   equ     0x101D
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PTIMER  equ     0x1028  ; PPPoE LCP request timer
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PMAGIC  equ     0x1029  ; PPPoE LCD magic number
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UIPR0   equ     0x102A  ; Unreachable IP address 1st octet
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UIPR1   equ     0x102B
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UIPR2   equ     0x102C
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UIPR3   equ     0x102D
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UPORT0  equ     0x102E  ; Unreachable port (big endian)
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UPORT1  equ     0x102F
65 24 winston
 
66
        ; Socket registers (base address - socket 0)
67 384 winston
Sn_BASE equ     0x04    ; amount to subtract from addr. to
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                        ; derive buffer base
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Sn_MAX  equ     0x48    ; high byte of highest socket reg.
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Sn_MR   equ     0x1400  ; Socket 0 mode
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Sn_CR   equ     0x1401  ; Socket 0 command
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Sn_IR   equ     0x1402  ; Socket 0 interrupt
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Sn_SR   equ     0x1403  ; Socket 0 status
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Sn_PORT0 equ    0x1404  ; Socket 0 port (big endian)
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Sn_PORT1 equ    0x1405
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Sn_DHAR0 equ    0x1406  ; socket 0 destination ethernet addr.
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Sn_DHAR1 equ    0x1407
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Sn_DHAR2 equ    0x1408
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Sn_DHAR3 equ    0x1409
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Sn_DHAR4 equ    0x140A
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Sn_DHAR5 equ    0x140B
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Sn_DIPR0 equ    0x140C  ; Socket 0 destination IP addr.
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Sn_DIPR1 equ    0x140D
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Sn_DIPR2 equ    0x140E
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Sn_DIPR3 equ    0x140F
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Sn_DPORT0 equ   0x1410  ; Socket 0 dest port (big endian)
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Sn_DPORT1 equ   0x1411
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Sn_MSSR0 equ    0x1412  ; Socket 0 max segment size
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Sn_MSSR1 equ    0x1413
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Sn_PROTO equ    0x1414  ; Socket 0 proto in IP raw mode
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Sn_TOS  equ     0x1415  ; Type of service
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Sn_TTL  equ     0x1416  ; Socket 0 time-to-live
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Sn_TX_FSR0 equ  0x1420 ; Socket 0 free size
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Sn_TX_FSR1 equ  0x1421 ; (big endian)
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Sn_TX_RD0 equ   0x1422  ; TX read pointer
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Sn_TX_RD1 equ   0x1423  ; TX read pointer
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Sn_TX_WR0 equ   0x1424 ; TX write pointer
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Sn_TX_WR1 equ   0x1425 ;
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Sn_RX_RSR0 equ  0x1426 ; Socket 0 received size
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Sn_RX_RSR1 equ  0x1427
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Sn_RX_RD0 equ   0x1428 ; Socket 0 RX read pointer
102
Sn_RX_RD1 equ   0x1429
103 24 winston
 
104
        ; Register bit values for ORing into bitfields
105
        ; Mode register
106 384 winston
MR_IND equ      1       ; Set for indirect bus IF mode
107
MR_AI equ       2       ; Set for address auto increment
108
MR_PPPoE equ    8       ; Use PPPoE
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MR_PB   equ     16      ; Set ping block
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MR_RST  equ     128     ; Software reset
111 24 winston
 
112
        ; Interrupt register
113 384 winston
IR_S0_INT equ   1       ; Socket 0 interrupt enable
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IR_S1_INT equ   2       ; Socket 1 EI
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IR_S2_INT equ   4
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IR_S3_INT equ   8
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IR_PPPoE equ    32      ; PPPoE interrupts
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IR_UNREACH equ  64      ; Dest unreachable interrupt
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IR_CONFLICT equ 128     ; IP conflict interrupt
120 24 winston
 
121
        ; Interrupt mask register - as interrupt register.
122 384 winston
IM_S0_INT equ   1
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IM_S1_INT equ   2
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IM_S2_INT equ   4
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IM_S3_INT equ   8
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IM_PPPoE equ    32
127
IM_UNREACH equ  64
128
IM_CONFLICT equ 128
129 24 winston
 
130
        ; Socket modes
131 384 winston
S_MR_CLOSED equ         0
132
S_MR_TCP equ            1
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S_MR_UDP equ            2
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S_MR_IPRAW equ          3
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S_MR_MACRAW equ         4
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S_MR_PPPoE equ          5
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S_MR_NDMC equ           32      ; Use no delayed ACK
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S_MR_MULTI equ          128     ; enable multicasting
139 24 winston
 
140
        ; Socket commands
141 384 winston
S_CR_OPEN equ   1
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S_CR_LISTEN equ 2
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S_CR_CONNECT equ        4
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S_CR_DISCON equ 8
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S_CR_CLOSE equ  0x10
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S_CR_SEND equ   0x20
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S_CR_SEND_MAC equ       0x21
148
S_CR_SEND_KEEP  equ     0x22
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S_CR_RECV equ           0x40
150 24 winston
 
151
        ; Interrupt register
152 384 winston
S_IR_CON equ            1       ; Connected
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S_IR_DISCON equ 2       ; Disconnected
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S_IR_RECV equ   4       ; Data received
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S_IR_TIMEOUT equ        8       ; Timeout occurred
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S_IR_SEND_OK equ        16      ; Send completed
157 24 winston
 
158
        ; poll(2) definitions (see above)
159 384 winston
POLLIN  equ     5       /* S_IR_RECV | S_IR_CON */
160
POLLHUP equ     2       /* S_IR_DISCON - output only */
161 24 winston
 
162
        ; Bit version of the above
163 384 winston
BIT_IR_CON equ          0
164
BIT_IR_DISCON equ       1
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BIT_IR_RECV equ         2
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BIT_IR_TIMEOUT equ      3
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BIT_IR_SEND_OK equ      4
168 24 winston
 
169
        ; Status register - values, not bits
170 384 winston
S_SR_SOCK_CLOSED equ    0x00    ; Socket is closed
171
S_SR_SOCK_INIT equ      0x13    ; Socket is initialized
172
S_SR_SOCK_LISTEN equ    0x14    ; Listen state
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S_SR_SOCK_ESTABLISHED equ        0x17 ; Connection establised
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S_SR_SOCK_CLOSE_WAIT equ        0x1C ; CLOSE_WAIT state
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S_SR_SOCK_UDP equ       0x22    ; UDP socket
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S_SR_SOCK_IPRAW equ     0x32    ; Raw socket
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S_SR_SOCK_MACRAW equ    0x42    ; Raw ethernet
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S_SR_SOCK_PPPOE equ     0x5F    ; PPPoE socket
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S_SR_SOCK_SYNSENT equ   0x15    ; SYN_SENT state
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S_SR_SOCK_SYNRECV equ    0x16   ; SYN_RECV
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S_SR_SOCK_FIN_WAIT equ  0x18    ; FIN_WAIT
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S_SR_SOCK_CLOSING equ   0x1A    ; Closing the socket
183
S_SR_SOCK_TIME_WAIT equ 0x1B ; TIME_WAIT
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S_SR_SOCK_LAST_ACK equ  0x1D
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S_SR_SOCK_ARP1 equ      0x11
186
S_SR_SOCK_ARP2 equ      0x21
187
S_SR_SOCK_ARP3 equ      0x31
188 24 winston
 
189 384 winston
REGISTER_PAGE equ       0x80    ; external mem page 0
190
BUFFER_PAGE equ         0x81    ; external mem page 1
191
MEMMGMT equ             0xE0    ; memory manager port
192 24 winston
 
193 384 winston
INVALID_SOCKNUM equ     4       ; >=4 is not valid.
194 24 winston
 
195
        ; Buffer memory should be paged into area A.
196 384 winston
gSn_RX_BASE equ 0x1000
197
gSn_RX_MASK equ 0x07FF
198
gSn_TX_BASE equ 0x1000
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gSn_TX_MASK equ 0x07FF
200 24 winston
 
201
; Definitions not of the W5100 chip, rather just concerining it.
202 110 winston
; Hardware pages
203
RX_LWRDATAPAGE  equ 0x46
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RX_UPRDATAPAGE  equ 0x47
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TX_LWRDATAPAGE  equ 0x44
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TX_UPRDATAPAGE  equ 0x45
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REGPAGE         equ 0x40
208 24 winston